Zacharelos, Efstratios (2023) Integrated Spike Detection using Approximate Methods. [Tesi di dottorato]

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Tipologia del documento: Tesi di dottorato
Lingua: English
Titolo: Integrated Spike Detection using Approximate Methods
Autori:
Autore
Email
Zacharelos, Efstratios
efstratios.zacharelos@unina.it
Data: 10 Marzo 2023
Numero di pagine: 130
Istituzione: Università degli Studi di Napoli Federico II
Dipartimento: Ingegneria Elettrica e delle Tecnologie dell'Informazione
Dottorato: Ingegneria elettronica e delle telecomunicazioni
Ciclo di dottorato: 35
Coordinatore del Corso di dottorato:
nome
email
Riccio, Daniele
daniele.riccio@unina.it
Tutor:
nome
email
Napoli, Ettore
[non definito]
Data: 10 Marzo 2023
Numero di pagine: 130
Parole chiave: Spike Detection, Approximate Computing, Integrated Neural Networks
Settori scientifico-disciplinari del MIUR: Area 09 - Ingegneria industriale e dell'informazione > ING-INF/01 - Elettronica
Depositato il: 14 Apr 2023 08:09
Ultima modifica: 10 Apr 2025 13:02
URI: http://www.fedoa.unina.it/id/eprint/15114

Abstract

Research on Brain-Machine Interfaces has progressed at a notable speed since the realization that devices directly controlled by ensembles of cortical neurons are viable. Recording the voltage fluctuations resulting from neural oscillations helps us determine changes in brain activity that might be useful in diagnosing brain disorders, like epilepsy. These readings reflect the summation of the synchronous activity of millions of neurons that have similar spatial orientation. Transmitting massive data wirelessly for external post-processing poses unrealistic bandwidth and power requirements. Spike detection algorithms can mitigate the problem by processing the raw signal on-line and transmitting only the relevant information off-brain. During the last years, machine learning approaches have been considered for spike detection and classification. The innate error factor in machine learning and the vast number of required multiplications in a NN, make introducing approximate computing to this application, a viable option. In this work, two main categories of approximate binary multipliers are considered: multipliers using approximate compressors and multipliers using recursive architectures with smaller approximate modules. In this way, a significant reduction in silicon area and power dissipation can be achieved. A dense network has been developed to detect and categorize spikes in simulated brain activity, achieving an accuracy of 98%. The model’s architecture has been described in HDL-Verilog. Using 12 bits for signal representation, the accuracy remains at high levels, 97%. By employing approximate methods, a reduction in silicon area by 34% can be achieved, for an accuracy drop of only 1.4%.

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