Di Cicco, Adele (2007) Development of a FPGA based test system for Double Data Rate high speed memory devices. [Tesi di dottorato] (Unpublished)

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Item Type: Tesi di dottorato
Language: English
Title: Development of a FPGA based test system for Double Data Rate high speed memory devices
Creators:
CreatorsEmail
Di Cicco, AdeleUNSPECIFIED
Date: 2007
Date Type: Publication
Number of Pages: 92
Institution: Università degli Studi di Napoli Federico II
Department: Scienze fisiche
PHD name: Tecnologie innovative per materiali, sensori ed imaging
PHD cycle: 17
PHD Coordinator:
nameemail
Vaglio, RuggeroUNSPECIFIED
Tutor:
nameemail
Aloisio, AlbertoUNSPECIFIED
Date: 2007
Number of Pages: 92
Uncontrolled Keywords: Double data rate; Signal integrity; Jitter
MIUR S.S.D.: Area 02 - Scienze fisiche > FIS/01 - Fisica sperimentale
Date Deposited: 14 May 2008
Last Modified: 30 Apr 2014 19:26
URI: http://www.fedoa.unina.it/id/eprint/1591

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