Vitone, Marco (2023) Development of innovative techniques and methodologies for analysis and testing of Storage Systems interfaces based on System on Chip. [Tesi di dottorato]
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| Tipologia del documento: | Tesi di dottorato |
|---|---|
| Lingua: | English |
| Titolo: | Development of innovative techniques and methodologies for analysis and testing of Storage Systems interfaces based on System on Chip |
| Autori: | Autore Email Vitone, Marco marco.vitone@unina.it |
| Data: | 12 Dicembre 2023 |
| Numero di pagine: | 95 |
| Istituzione: | Università degli Studi di Napoli Federico II |
| Dipartimento: | Ingegneria Elettrica e delle Tecnologie dell'Informazione |
| Dottorato: | Information technology and electrical engineering |
| Ciclo di dottorato: | 36 |
| Coordinatore del Corso di dottorato: | nome email Russo, Stefano stefano.russo@unina.it |
| Tutor: | nome email Petra, Nicola [non definito] Giaccio, Claudio [non definito] |
| Data: | 12 Dicembre 2023 |
| Numero di pagine: | 95 |
| Parole chiave: | System on Chip, FPGA, digital verification, hardware accelerators, Fast Fir Algorithm, Convolutional Neural Network |
| Settori scientifico-disciplinari del MIUR: | Area 09 - Ingegneria industriale e dell'informazione > ING-INF/01 - Elettronica |
| Depositato il: | 12 Dic 2023 10:58 |
| Ultima modifica: | 12 Mar 2026 09:46 |
| URI: | http://www.fedoa.unina.it/id/eprint/15658 |
Abstract
System on Chip (SoC) is a complex Integrated Circuit (IC) that includes several components such as CPU, Programmable Logic (FPGA), on-chip memory, storage interfaces, and so on. Over the last decades, the SoC has been widely used in signal processing, communication, networking, and several industrial applications, from the automotive to storage systems management. Although the SoC platform represents an optimal solution for large-scale industrial product development, the SoC complexity determines a huge effort to validate the entire system. During my PhD program, I collaborated with Micron Technology and I worked on a state-of-the-art SoC device and storage system. One of the crucial steps of the design flow consists of the verification of the entire system and interfaces of the product. To address this issue, my research activity focuses on the development of innovative techniques for the validation of storage systems based on SoC. More specifically, a simulation environment has been developed for a custom Micron SoC according to the latest verification methodologies accepted in the Literature as well as in industrial companies. However, the simulations of complex devices, which include a huge number of peripherals, semiconductor intellectual proprieties, and bus interfaces, became a bottleneck in terms of time consumption. To this end, in this dissertation, an innovative hardware emulation technique has been presented which aims to overcome the simulation time bottleneck by integrating the hardware-in-the-loop in the verification flow. Furthermore, another important issue related to the SoC design consists of the hardware accelerator implementation and system-level integration. My academic research also addresses this aspect of the SoC. In particular, a digital data path for the hardware acceleration of a Convolutional Neural Networks (CNNs) has been presented. First of all, a novel Fast FIR Algorithm (FFA) for mono- and bi-dimensional convolution has been explored, then the hardware implementation of the proposed algorithm has been presented.
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