Moriconi, Alberto (2025) A Methodology for the Synthesis of Approximate Circuits Targeting ASIC and FPGA Technologies. [Tesi di dottorato]
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| Tipologia del documento: | Tesi di dottorato |
|---|---|
| Lingua: | English |
| Titolo: | A Methodology for the Synthesis of Approximate Circuits Targeting ASIC and FPGA Technologies |
| Autori: | Autore Email Moriconi, Alberto alberto.moriconi@unia.it |
| Data: | 10 Giugno 2025 |
| Numero di pagine: | 174 |
| Istituzione: | Università degli Studi di Napoli Federico II |
| Dipartimento: | Ingegneria Elettrica e delle Tecnologie dell'Informazione |
| Dottorato: | Information technology and electrical engineering |
| Ciclo di dottorato: | 37 |
| Coordinatore del Corso di dottorato: | nome email Russo, Stefano stefano.russo@unina.it |
| Tutor: | nome email Mazzocca, Nicola [non definito] |
| Data: | 10 Giugno 2025 |
| Numero di pagine: | 174 |
| Parole chiave: | automated design methodology, approximate computing, multi- objective optimization, approximate logic synthesis, low area approximate circuits, low power approximate circuits |
| Settori scientifico-disciplinari del MIUR: | Area 09 - Ingegneria industriale e dell'informazione > ING-INF/05 - Sistemi di elaborazione delle informazioni |
| Informazioni aggiuntive: | Candidato del ciclo XXXVII |
| Depositato il: | 14 Giu 2025 16:37 |
| Ultima modifica: | 02 Set 2026 08:08 |
| URI: | https://www.fedoa.unina.it/id/eprint/16792 |
Abstract
Approximate computing is a recent design paradigm that exploits the inherent error resilience of a range of applications by trading off exact computation with some desirable property of the system, typically energy efficiency. In the scientific literature, many approximate computing techniques aiming at circuits having superior performances, in terms of speed, silicon area end energy requirements, have been proposed. However, they are not generic techniques and very often they are closely linked to a specific application. In this thesis, we propose a generic and automatic methodology for the synthesis of approximate circuits based on the local rewriting of And-Inverter Graphs. Given a Hardware Description Language description of a combinational circuit, Satisfiability Modulo Theories based exact synthesis is used to build a catalogue of candidate substitutes for selected cuts of the circuit, that are formally proven to be size-optimal w.r.t. the number of AND nodes. A heuristic based on a multi-objective simulated annealing algorithm is used to guide the choice of the cuts to substitute, in order to obtain a set of dominant configurations w.r.t. the error rate and the number of nodes in the circuit. We evaluate our approach using di!erent benchmarks, and, in order to measure actual gains, we perform actual synthesis of Pareto-optimal approximate configurations, both targeting the Application-Specific Integrated Circuit and Field Programmable Gate Array (FPGA) technologies. We also propose an alternative approach that uses a simple Look-Up Table power model to drive the optimization when targeting the FPGA technology. Experimental results show that the proposed approach allows achieving significant savings, since resulting approximate circuits exhibit lower circuit area, lower power dissipation and restrained error w.r.t. their exact counterparts.
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